Panmnesia
In an interesting evolution for the GPU manufacture , PCIe - attached memory is set to change how we imagine about GPU retention capacity and performance . Panmnesia , a companionship back up by South Korea ’s KAIST research institute , is working on a engineering call up Compute Express Link , or CXL , that allows GPUs to utilize external memory resource via the PCIe port .
Traditionally , GPUs like theRTX 4060are limited by their onboard VRAM , which can bottleneck performance in store - intensive tasks such as AI training , information analytics , and high - resolution gaming . CXL leverages the high - speed PCIe connecter to attach external memory modules directly to the GPU .
Panmnesia
This method allow a low - latency retention expansion pick , with functioning metric function showing important improvements over traditional methods . agree to reports , the new engineering manages to achieve three-fold - digit nanosecond latency , which is a substantial reduction compared to stock SSD - based solutions .
Moreover , this applied science is n’t limit to just traditional RAM . SSDs can also be used to expand GPU memory , offering a versatile and scalable solution . This capacity allows for the creation of intercrossed memory system that immix the speed of random access memory with the capacity of SSDs , further enhancing carrying out and efficiency .
While CXL maneuver on a PCIe link , integrating this technology with GPUs is n’t square . GPUs miss the necessary CXL logic fabric and subsystems to support DRAM or SSD endpoints . Therefore , simply adding a CXL controller is not practicable .
GPU cache and computer storage system of rules only recognize expansions through Unified Virtual Memory ( UVM ) . However , test done by Panmnesia revealed that UVM had the poorest functioning among quiz GPU kernels due to command processing overhead time from host runtime intervention during page mistake and inefficient data transference at the varlet level .
To address the issue , Panmnesia develop a serial publication of hardware level that sustain all key CXL protocol , consolidated into a coordinated control . This CXL 3.1 - compliant antecedent complex includes multiple ascendent ports for outside memory over PCIe and a server bridge with a boniface - managed twist memory decoder . This decipherer connects to the GPU ’s system heap and carry off the scheme storage , providing unmediated access to expanded storehouse via load / store command , effectively eliminating UVM ’s issues .
The implications of this engineering science are far - reaching . For AI and auto acquisition , the ability to add more computer storage mean treat larger datasets more expeditiously , speed up breeding time , and improving model truth . In play , developers can labour the bound of graphical fidelity and complexity without being tighten by VRAM limitations .
For data center and cloud figure environments , Panmnesia ’s CXL engineering provide a price - effective fashion to elevate existing base . By attaching extra computer memory through PCIe , data center can heighten their computational power without requiring broad hardware overhauls .
Despite its potential , Panmnesia confront a magnanimous challenge in gaining industrywide adoption . Thebest graphics cardsfrom AMD and Nvidia do n’t bear CLX , and they may never support it . There ’s also a high-pitched possibility that industry players might develop their own PCIe - attached memory technologies for GPUs . Nonetheless , Panmnesia ’s instauration represent a step forrad in plow GPU memory bottlenecks , with the potential to affect high - performance computing and gaming significantly .
